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TECHNICAL DATA
KK0066 DOT MATRIX LCD CONTROLLER &DRIVER
The KK0066 is a dot matrix liquid crystal display controller & driver LSI that displays alphanumeric, characters and symbols. It drives dot matrix LCD under microcomputer control. All functions needed for dot matrix LCD drive are internally provided on one chip.
FEATURES
* Internal Memory - Character Generator ROM: 8320 bits - Character Generator RAM: 512 bit - Display Data RAM: 80 x 8 bits for 80 digits * Internal automatic reset circuit at power ON * Internal oscillation circuit * Power Supply Voltage: +5V 10% * LCD Driving Voltage for display: 0 ~ -5V(V5) * Duty factor selection (selected by programs) 1/8 duty: 5 x 7 dots format 1 line, 1/11 duty: 5 x 10 dots format 1 line 1/16 duty: 5 x 7 dots format 2 line * Bare chip available * Pin-to-Pin replacement for KS0066, HD44780, SED1278
FUNCTION
* Character type dot matrix LCD driver & controller * Internal driver: 16 common and 40 segment signal output * Display character format: 5 x 7 dots + cursor, 5 x 10 dots + cursor * Easy interface with a 4-bit or 8-bit MPU * Display character pattern: 5 x 7 dots format: 192 kinds, 5 x 10 dots format: 32 kinds * The special character pattern can be programmable by Character Generator RAM directly * A customer character pattern can be programmable by mask option * Wide range of instruction function: Display clear, Cursor home, Display ON/OFF, Display shift Cursor ON/OFF, Display character blink, Cursor shift
ODERING INFORMATION
Type KK0066 - 00 KK0066 - 01 KK0066 - XX English English CGROM Numberal Numberal Custom font (XX - ROM code) Japanese Cyrillic
ABSOLUTE MAXIMUM RATINGS
Characteristic Power Supply Voltage Driver Supply Voltage Input Voltage Operating Temperature Storage Temperature Symbol VDD V1 ~ V 5 VI Ta Tstg Value - 0.3 ~ 7.0 VDD - 13.5 ~ VDD + 0.3 -0.3 ~VDD + 0.3 - 20 ~ + 75 - 55 ~ + 125 Unit V V V
o o
C C
Notes: Must keep the relation of VDD V1 V2 V3 V4 V5
1
KK0066
BLOCK DIAGRAM
Power supply for LCD Drive
V1 V2 V3 V4 V5
5
Par allel/ Ser ial Data conversion Circuit
5
Busy Flag
Char acter Gener ator ROM 8320 bits
Char acter Gener ator RAM 512 bits
Cursor Blink Control Circuit
DB0~DB3 4 DB4~DB7 4
8 8
I/ O Buffer R/ W RS E
8
8
SEG1
Data Register
7
8
Segment to 40 - bit 40 - bit SEG40 Shif t 40 L at ch 40 Sign al 40 Dr iver Regist er Cir cuit
7
Instruction Register 8
Instruction Decoder
Display Data RAM 80 x 8 bits
D
7
7
7
Address Counter
7
16 - bit Shift 16 Register
Common COM16 Sign al 16 Driver
COM1 to
OSC1 OSC2 Timing Gener ation Circuit
CLK1 CLK2 M
VDD VSS
2
KK0066
ELECTRICAL CHARACTERISTICS
(Ta = 25oC, VDD = +5V, VSS = 0V unless otherwise specified) Characteristic Operating Voltage Operating Current (*1) HIGH Input Voltage LOW Input Voltage Symbo l VDD IDD Internal oscillation or external clock fOSC = 270KHz E, DB0 ~ DB7, R/W, RS OSC1 VIL E, DB0 ~ DB7, R/W, RS OSC1 HIGH Output Voltage VOH IOH = -0.205 mA IOH = -40A LOW Output Voltage VOL IOL = 1.2mA IOL = 40A Driver Voltage Descending Input Leakage Current Input LOW Current Freque ncy(*1) Duty VCOM VSEG ILKG IIL fEC DUTY tR tF fOSC1 fOSC2 Rf = 91K 2% OSC1, OSC2 190 245 270 250 OSC1 VIN =0V ~ VDD VCC = 5V (test pull up R) IO = 0.1mA DB0 ~ DB7 CLK1, CLK2, M, D DB0 ~ DB7 CLK1, CLK2, M, D COM1 ~ COM16 SEG1 ~ SEG40 E RS, R/W, DB0 ~ DB7 -1 -50 125 46 -125 250 50 2.2 VDD-1.0 -0.3 -0.2 2.4 0.9VDD 0.4 0.1VD
D
Test Condition
Applicable Terminals
Min 4.5
Typ
Max 5.5
Uni t V
0.35
0.6
VIH
VDD VDD 0.6 1.0
V
V
V
V
1.0 1.0 1 -250 350 55 0.2 0.2 350 255
V
A A KH z % s s KH z
External Clock
Rise time Fall time Internal Clock Frequency(*1) Ceramic Resonator Oscillation Frequency (*1) LCD Driving Voltage (*2)
VLCD1 VLCD2
VDD - V5
1/5 bias 1/4 bias
V1 ~ V5
4.6 3.0
10.0 10.0
V
3
KK0066
Notes: *1). Oscillation circuit Resistor circuit
OSC1 Rf Rf : 91k +2%
Frequency input open
External clock circuit
OSC2
OSC1
OSC2
*2). Input the voltage listed in table below to V1 ~ V5 Duty Bias Power supply V1 VDD - VLCD/4 VDD - VLCD/5 V2 VDD - VLCD/2 VDD - 2VLCD/5 V3 VDD - VLCD/2 VDD - 3VLCD/5 V4 VDD - 3VLCD/4 VDD - 4VLCD/5 V5 VDD - VLCD VDD - VLCD *VLCD is the LCD driving voltage, refer to the initial set of the instruction code. 1/8, 1/11 1/4 1/16 1/5
AC CHARACTERISTICS (VDD = 5V, VSS = 0V, Ta = 25oC)
(1) Write mode (Writing data from MPU to KK0066) Characteristic E Cycle Time E Rise Time E Fall Time E Pulse Width (High, Low) R/W and RS Set-up Time R/W and RS Hold Time Data Set-up Time Data Hold Time Symbol tC tR tF tW tSU1 tH1 tSU2 tH2 Test pin E E E E R/W, RS R/W, RS DB0 ~ DB7 DB0 ~ DB7 220 40 10 60 10 Min 500 25 25 Typ Max Unit ns ns ns ns ns ns ns ns
RS
VIH1 VIL1 tSU1
VIH1 VIL1 tH1
R/ W VIL1 t H1 tW VIL1
E
VIL1
tR
t SU2
tH2
VIH1 DB0 ~ DB7 VIL1 tC Valid Data
VIH1 VIL1
4
KK0066
(2) Read mode (Reading data from KK0066 to MPU) Characteristic E Cycle Time E Rise Time E Fall Time E Pulse Width (High, Low) R/W and RS Set-up Time R/W and RS Hold Time Data Output Delay Time Data Hold Time (3) Interface mode with IZ0065 Characteristic Clock Pulse Width High Clock Pulse Width Low Data Set-up Time Data Hold Time Clock Set-up Time M Delay Time Symbol tWCKH tWCKL tSU tDH tCSU tDM Test pin CLK CLK D D CLK M Min 800 800 300 300 500 -1000 1000 Typ Max Unit ns ns ns ns ns ns Symbol tC tR tF tW tSU1 tH1 tD tH2 Test pin E E E E R/W, RS R/W, RS DB0 ~ DB7 DB0 ~ DB7 20 220 40 10 120 Min 500 25 25 Typ Max Unit ns ns ns ns ns ns ns ns
0.9VDD CLK1 tWCKH tCSU CLK2 0.1VDD tCSU 0.9VDD
0.9VDD
tWCKH 0.9VDD 0.1VDD tWCK1 0.1VDD
D
0.9VDD 0.1VDD tSU
0.9VDD 0.1VDD tDM
M
0.9VDD tDM
5
KK0066
TERMINAL DESCRIPTION
Pin
VDD VSS V1 - V5 SEG1- SEG40 COM1- COM16 OSC1 OSC2 CLK1 CLK2 M Output Output Output Input Output Data latch clock Data shift clock Alternated signal for LCD driver output Display data interface Power Negative Supply Voltage Segment output Common output Oscillator
INP/ OUT
Name
Operating Voltage
DESCRIPTION
For logical circuit (+5V 10%) 0V(GND) Bias voltage level for LCD driving Segment signal output for LCD driving Common signal output for LCD driving Both pin connected to Rf resistor or ceramic resonator for internal oscillator circuit. In case of external frequency use only, the frequency is input to OSC1 terminal. Clock output terminal for the serially transferred data to be latched to the driver. Clock output terminal used when D terminal data output shifts the inside of the driver. The alternating signal to convert LCD drive waveform to AC. Character pattern data, which is corresponding to each common signal, is supplied to driver serially. High Low Selection Non selection
INTERFACE
Power Supply
LCD LCD Resistor or Ceramic Resonator
IZ0065
D
E R/W
Input
Enable Read/Write
Start anable signal to read or write the data R/W signal input is used to select the read/write mode
MPU
High Low
Read mode Write mode
RS
Register select
Register selection input High Low Data register read and write) (for
Instruction register (for write), Busy flag, address counter (for read)
DB0 - DB7
Input/O utput
Data interface
Used for data transfer between the MPU and KK0066. These terminals are for data bus with bidirectional three-state. Initial 4 bit (DB0-DB3) are not used during 4 bit operation (DB7 can be used as a busy flag)
6
KK0066
CONTROL AND DISPLAY COMMANDS
Command RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Executi on time (fOSC=2 50KHz)
Remark
DISPLAY CLEAR RETURN HOME ENTRY MODE SET
L L L
L L L
L L L
L L L
L L L
L L L
L L L
L L H
L H I/D
H X SH
1.64 ms 1.64 ms 40s Cursor move to first digit *I/D: set cursor move direction
I/D H L Increase Decrease
*SH: Specifies shift of display
SH H L Display is shifted Display is not shifted
DISPLAY ON/OFF
L
L
L
L
L
L
H
D
C
B
40s
*Display
D H L Display on Display off
*Cursor
C H L Cursor on Cursor off
*Blinking
B H L Blinking on Blinking off
SHIFT
L
L
L
L
L
H
S/C
R/L
X
X
40s
SC H L Display shift Cursor move
R/L
H L
Right shift Left shift
7
KK0066
Executi on time (fOSC=2 50KHz)
Command
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Remark
SET FUNCTIO N
L
L
L
L
H
DL
N
F
X
X
40s
DL
H L
8 bits interface 4 bits interface
N
H L H L
2 line display 1 line display 5x10 dots 5x7 dots
F
SET CG RAM ADDRESS SET DD RAM ADDRESS READ BUSY FLAG & ADDRESS
L
L
L
H
CG RAM address (corresponds to cursor address)
40s
L
L
H DD RAM address
40s
CG RAM Data is sent and received after this setting DD RAM Data is sent and received after this setting
BF H L Busy Ready
L
H
BF Address Counter used for Both DD & CG RAM address
0s -Reads BF indication internal operating is being performed. -Reads address counter contents Write data DD or CG RAM Read data from DD or CG RAM
WRITE DATA READ DATA
H H
L H
Write Data Read Data
46s 46s
Note: X - Don't care.
8
KK0066
When IZ0065 is externally connected to the KK0066, you can increase the number of display digits up to 80 characters.
L CD P anel
CO 1~ COM M 16 D2 L D1 R
SG SG E 1~ E 40
S 1 ~ S 40 C C
S 1 ~ S 40 C C D2 L D1 R D1 L F CS SL H1 D2 R D1 L
S 1 ~ S 40 C C
D2 L D1 R
D
D1 L D2 R F CS
D2 R
OS C1
SL H1 CL 2 SL H2 M VS S VD D V V V V V V VE 65 4 3 2 1E
IZ 0065
CL 1
IZ 0065
CL 1 CL 2 SL H2 M VS S VD D V V V V V V VE 65 4 3 2 1E
F CS SL H1
IZ 0065
CL 1
CL 2
OS C2
SL H2 M VS S D VD V V V V V V VE 65 4 3 2 1E
KK0066
S VS
M CL 1 K CL 2 K
D VD
VD D
V 1
V 1
APPLICATION CIRCUIT
V 2 V 3 V 4 DB ~ DB 0 7
T MP o U
V 2
V 3
V 4
V 5
V 5
G Dor N other voltage
VLCD (1/5 bia s)
9
KK0066
PAD DIAGRAM
(0,0)
KK0066 Chip size P d size a U nit
P AD DIAGR AM : 4000 x 4900 : 120 x 120 : m
The chip substrate is connected to VDD.
PAD LOCATION
Pad No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
Pad Name
SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 GND OSC1 OSC2 V1 V2
X
-2221 -2041 -1804 -1624 -1444 -1264 -1084 -904 -724 -544 -364 -184 -4 176 35 536 716 896 1076 1256 1436 1616 1920 2100 2299 2299 2299
Y
-1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1552 -1372 -1192
Pad No.
28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
Pad Name
V3 V4 V5 CL1 CL2 VCC M D RS R/W E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8
X
2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2188 2008 1812 1632 1436 1256 961 781 601 421 241 61 -119 -299
Y
-1012 -832 -862 -472 -292 -112 68 248 428 608 788 1090 1270 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830
Pad No.
55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
Pad Name
COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23
X
-530 -710 -941 -1121 -1301 -1481 -1661 -1841 -2036 -2216 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298
Y
1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1404 1224 1044 864 684 504 324 144 -36 -216 -396 -576 -756 -936 -1116 -1296
10

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